The present invention relates to the field of semiconductors, and more particularly to a Schottky barrier diode formed on a silicon carbide substrate.
It has been known that silicon carbide (SiC) is a superior substrate material for the fabrication of devices such as Schottky barrier rectifiers and MOSFETs. The properties of SiC are generally considered ideal for high voltage applications as they result in low on-resistance and low reverse recovery time, on the order of  less than 2 ns. Prior work by the present inventor, as described in the ""627 application, has disclosed that edge termination and surface passivation improve the ruggedness of the semiconductor device. The method of fabrication disclosed in the ""627 application and other previous methods require the use of multiple photolithography and precise mask alignment to produce a reliable device. The invention disclosed in the ""627 patent application involves three steps of photolithography and two steps of alignment, resulting in an improved product, but requiring an expensive process. In addition, the alignment steps must be implemented on state-of-the-art equipment that is often not available in older fabrication facilities. The present invention provides a less complex fabrication process that can be completed on less sophisticated equipment with equal or better performance characteristics.
Therefore, it is an object of the present invention to provide a Schottky barrier diode and a method for fabrication with a minimum of process steps.
It is an additional object of the present invention to provide a method for the fabrication of a Schottky barrier diode without the need for multiple photolithography steps or mask alignment.
These and other objects will become more apparent from the description of the invention to follow.
The present invention provides an improved and more efficient method for the fabrication of SiC Schottky diodes. The fabrication method involves applying a mask to a surface of a SiC wafer. Typically, the wafer surface is passivated with an oxide layer, which must be etched away in the open areas of the mask prior to metal deposition. A metal layer or stack of metal layers is deposited on the wafer surface and the mask is removed, lifting the metal with the mask while leaving metal contacts in the oxide etched open area of the wafer. Edge termination using ion implantation of inert ions is created on the wafer surface adjacent the metal contacts to improve diode performance. Optionally, a second oxide layer can be deposited and etched down to below the level of the metal contacts.